Signaling output stage for generating digital voltage signals on a bus system

ABSTRACT

An arrangement for generating digital signals on first and second bus lines is tolerant of most line faults, and includes modules connected to both lines, an upper switch between a first potential and the first line, a middle switch between the two lines, and a lower switch between the second line and a second potential lower than the first potential. The switches are controlled to generate digital signals as the potential difference between the two lines. If a fault potential (e.g. a short to ground or other potential) arises on one line, then the switches drive the non-faulty line to provide the required signals relative to the fault potential on the faulty line. Closing the middle switch ensures that the two lines are at the same potential for a low signal. This arrangement is for is signaling in various bus systems, e.g. in vehicle occupant protection systems in motor vehicles.

FIELD OF THE INVENTION

The invention concerns a signalling output stage for generating digitalvoltage signals on a bus system connecting a central processor unit viatwo signal lines to a plurality of modules.

BACKGROUND INFORMATION

According to the state of the art, so-called push-pull-signalling outputstages with two sets of transistor-switching equipment are usually usedas signalling output stages, connecting a line either with the supplyvoltage or to ground. In general, short circuits to an interferencepotential (e.g. to ground), the supply voltage, or another thirdpotential may lead to an attenuation of the necessary :signal amplitudeand thus to faults in the signal recognition up to and including thefailure of the signalling output stage.

In order to prevent this, an integrated transmit and receive circuit isto be taken from DE 196 11 944 A1 for coupling a control unit to atwo-wire bus, where a test device for fault recognition on the bussystem lines is provided and where, in addition to a standard operatingmode, further different operating modes are provided which, in the eventof a fault, allow communication adjusted to the actual fault type. Thisis known as a fault-related change-over of the circuit terminationelements. Employing the switching equipments in FIG. 3a makes itpossible, if signal reception is no longer possible with VCC, toinitially apply CAN_L to Vbatt, instead of using termination resistors16 and 17 which in normal operation mode apply CAN_H to GND and CAN_L toVCC. Moreover, it is also possible to deploy very low current sources 26and 27 permitting a current-limited retention of the signal reception.Column 7, starting at line 56, indicates that in the event of a defect,signalling can be abandoned as the transmission signal TXD can no longerhave any effect on the bus. The change-over thus mainly affects thereception of signals in a faulty bus, but not their transmission.

DE 39 01 589 A1 describes the coupling-up of a bus participant, in whicha resistor network assures that even in the presence of faults on thebus lines the data existing on the data bus can always be recognized.Here again, only those faults which occur during reception, and not atthe time of transmission, are being considered, even though transmissionoutputs are also connected by means of this resistor network, but beingconnected in a rigid way and consequentially not adaptable to the faulttype.

DE 195 09 133 A1 also describes a reception device compensating busfaults, that changes between one- and two-wire reception.

Therefore, these publications may suggest the various fault types,particularly short circuits to supply voltages or ground potential, butthey do not consider a signal generation adapted thereto.

DE 44 03 899 A1 teaches such a generic signalling output stage in adevice for serial data transmission between at least two stations. Thus,FIG. 2 shows a signalling output stage where an upper switchingequipment or device (T2) is connected between a first voltage potential(V2) and a first line (S+), and a lower switching equipment or device(T3) is connected between a second voltage potential (ground) and thesecond line (S−). In addition to this, various operating modes areprovided for the case of a fault on one of the lines, which enable asignal generation adapted to the type of the fault. Checking the linesfor short circuits, and signalling control, are implemented by directtechnical switching or circuit means, that is, shifting voltagepotentials on the lines will directly lead to different electricalconditions and thus to a different signalling. Thus, an independentsignalling is provided for on both lines S+ and S−, that is, line S+ isnot only connectable to V2 via R5,T2, but it can also be permanentlygrounded, via the high ohmic resistance R7, while S−, via R4, highlyohmically quiescently rests at V2 and can be pulled to ground byswitching T3.

In any emergency, signalling can thus be performed both just via S+ onits own as well as via S− on its own. In normal operation mode, bothlines feature straight inverse signals to one other (compare FIG. 4a).In addition, both lines feature a quiescent potential.

In correspondence to this, DE 195 03 460 C1 also describes a failuretolerant output stage of the generic type which features a test device(condition detection module) designed for the detection of faults andtheir particular type, as well as a transmission module with differentoperating modes, where again, however, the first and second line of thebus system can signal independently of one another, because both lineseach have their own connection to a high and a low voltage potential, ascan be seen from FIG. 2.

SUMMARY OF THE INVENTION

Based on this state of the art, this invention has the task to describea further bus failure-tolerant signalling output stage, that does nothave a fixed quiescent current load and yet provides a simple way, atleast for the majority of possible faults, to continue signal generationin a different operating mode. Additionally, a particularly preferredapplication within a bus system is to be stated, where the certainty ofdata transmission being maintained, even in the event of any faultsoccurring on the bus system, will be further improved.

The above stated task is achieved according to the invention in asignalling output stage for the generation of digital voltage signals ona bus system with a central processor unit and a number of modules,connected to it by means of two lines, where the digital voltage signalsassume one high voltage level and a corresponding lower voltage level.An upper switching equipment between a first voltage potential and thefirst line, as well as a lower switching equipment between a second,comparatively lower voltage potential and the second line are providedfor. The central processor unit features a test device, by means ofwhich faults on the lines, particularly short-circuits to a voltagepotential can be detected. A standard operating mode is provided, inwhich signal generation is effected by the high voltage level beinggenerated by closing the upper and lower switching equipments, and thelow voltage level by opening at least the upper switching equipment. Incase of a fault, additional different operating modes are provided for,which in spite of the fault enable digital voltage signals to begenerated in such a way that they are adjusted to the type of fault.Further, a middle switching equipment is provided between the first lineand the second line, by means of which signal generation will bemaintained at least in the case of a fault on one line.

The above stated task is further achieved according to the invention ina circuit arrangement including the inventive signalling output stage,within a bus system, and further comprising the following features. Allof the modules are further furnished with at least one short-circuittesting device for the two lines. The testing device is adapted to checkthe output of the respective line for an effective short-circuit, namelyan effective resistance which is too low. For each of the two lines,there is further provided one switching device located between an inputand an output of the respective line. The switching devices arerespectively adapted to switch a connection between the input and theoutput of each respective one of the two lines, only after a test hasbeen executed at the respective output by means of the respectiveshort-circuit testing device and if the test has proven the absence of ashort-circuit.

Advantageous further developments and embodiments of the invention areas set forth in the claims following this written description.

By using the two lines and three sets of switching equipment, it willbecome possible to drive the modules jointly via both lines, orindividually, via only one of the lines, if a fixed interferencepotential is being applied to the other line. Both lines can assumeeither of the two voltage potentials.

If a fixed interference potential, e.g. to ground or supply voltage, isapplied to a line, signalling or signal transmission will be implementedas a potential difference between the fixed interference potential ofthe short-circuited line and the line not subject to interference, thepotential of which will be controlled accordingly.

Although the expenditure will initially be greater, due to the threesets of switching equipment and the two lines, this really becomesnegligible if the new and varied options for signal generation, as wellas the transmission certainty gained, are taken into account.

The different processes for generating the digital voltage signal areeach optimized for one particular operating mode. A ground fault as wellas a short circuit to a third voltage potential in one of the two linesdo not necessarily lead to a failure of the modules or the signallingoutput stage. The relevant particular operating mode will be detected bymeans of a testing device, and the signalling output stage will bedriven according to the test result, that is, the processes used forgenerating the voltage signals will be changed over., if necessary.

In particular, for a bus system within a vehicle occupant protectionsystem, e.g. as used in a motor vehicle, in which—via the bussystem—control modules for triggering vehicle occupant protectiondevices are connected to one another, and to the central processor unit,in a way that allows them to communicate, protection of this kindagainst simple line short circuit faults is essential. These shortcircuits can occur particularly against the ground potential, which isgenerally routed along the metal vehicle body or against the operatingsupply voltage, which is conducted in a vehicle's cable harnesses as asupply voltage network on an immediately adjacent basis. Due to theexposure to extreme mechanical stresses, a possible destruction of thecable insulation found in motor vehicles can never be entirely excluded.In particular, during the course of an accident, the cables can besubjected to destruction. In order to be able to still transmit thesignals, that are relevant for the safety of vehicle occupants, to thecontrol modules in order to trigger the vehicle occupant protectiondevices, the option to transmit signals even in the event of faults onone of the lines, using the respective other line represents asignificant progress. In order to still be able to transmit signals evenin the event of a short circuit to the supply voltage, e.g. batterypower supply voltage, it is advantageous to select the two voltagepotentials applied to the switching equipment such that a potentialdifference arises which is still detectable as a high voltage level. Thehigher of the two voltage potentials should thus be increased by acorresponding amount compared to the supply system voltage. Naturally,applications with regard to other signalling tasks are not excluded.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be explained below by means of an embodiment exampleand the following figures. Short description of the figures:

FIG. 1 Block diagram of a bus system featuring a signalling output stagewith three sets of switching equipment and two lines in accordance withthe invention.

FIG. 2 Overview over the possible signalling processes in accordancewith the invention.

FIG. 3 Selection decision table with regard to the signalling processesused, based on the measured operating conditions or modes.

FIG. 4 Details of two modules featuring longitudinal switches forlimiting the effect of a short circuit.

DETAILED DESCRIPTION OF THE INVENTION

In FIG. 1, the bus system complete with a signalling output stage 1 isinitially shown in the form of a block diagram. In this embodimentexample, this signalling output stage forms a component part of thecentral processor unit 2, but in principle it can also be used withinthe various individual modules, if these are to transmit actively, andthus require a signalling output stage. Via the two lines L1 and L2, themodules M1 . . . Mx are connected to the central processing unit 2,which is effected such that the modules are arranged respectively inparallel one behind another between the two lines L1 and L2. Theindividual modules M1 . . . Mx respectively receive the arisingparticular voltage potential difference U between the first and secondlines L1, L2. A high potential difference U between L1 and L2 isconsidered to be a high voltage level, in analogy to this a lowpotential difference, particularly a zero voltage, is considered to be alow voltage level. The assignment of a digital logical value (logical 0or 1) is independent of this. Thus, particularly, a high voltage levelcan be used as the quiescent condition to ensure that the supply voltageis supplied to the individual modules M1 . . . Mx, even if no signalsare being transmitted.

The signalling output stage 1 comprises the three sets of switchingequipment or switching devices S1, S2 and S3, that are respectivelylocated between a first voltage potential φ2, the line L1, the line L2,and a second voltage potential φ2, which is defined as the lower one ofthe two. This determination is to be understood to be merely aprecondition for the unambiguousness of the processes to be described inthe following. The switching equipments or devices S1 to S3 areschematically shown as switches in FIG. 1, in reality, however they areof course embodied in the form of the usual known transistor switches.

In addition, and by way of example, FIG. 1 shows a short circuit of thefirst line L1 to a third voltage potential φ3. Such short circuits toground or to a third voltage potential occur (e.g. due to insulationfaults) on lines L1 and L2, as well as possibly on spatially adjacentcomponents and conductors. Since the case or housing is used as theelectrical ground potential, particularly in the field of motor vehicleelectronics, even a slight defect in the line insulation may lead to apermanent short circuit to ground. Even a short circuit e.g. to theoperation supply voltage potential may occur in a different line that issimilarly insufficiently insulated.

With open switching equipment S1, S2, S3, the lines L1 and L2 are freeof potential and floating in normal operation mode, so that bothlines—with an appropriate combination of switching equipment states—canassume both the first as well as the second voltage potentials. Onlywhen a short circuit occurs on a line, this will then be subject to afixed potential (second or third voltage potential), such that thesignalling needs to take this into account.

The signalling output stage 1 or the respective sets of switchingequipment S1, S2, and S3 thereof are driven by a control device 3 of thecentral processor unit 2. Moreover, in this embodiment example, all setsof switching equipment S1-S3 comprise a respectively assigned currenttesting device I1-I3. This will determine the current which respectivelyflows through the switching equipment, and compares the determinedcurrent to a permissible value range. If this value range is exceeded,the control device 3 connected with these testing devices I1 to I3 willdetermine whether the signalling process is to be changed. The selectiondecision used in this case will be explained in more detail inconnection with FIG. 3. The testing devices I1 to I3 are to be used tomonitor the operating mode or condition of the switching equipments S1to S3, as well as of the lines L1 and L2; in particular, the occurrenceof a short circuit on one of the lines to a third voltage potential orground is to be detected. Naturally, it is also possible—instead ofdetecting the current flow through the switching equipments—to detectthe voltage potentials of the two lines L1 and L2 by means of voltagetesting devices not shown here, and to compare these in accordance withadapted value ranges.

The special advantages provided by this signalling output stage can alsobe seen with regard to the signalling processes which have now becomepossible by this means, and which will be explained as follows by meansof the following overview in FIG. 2.

Thus, in the event of a short circuit in one line, signalling willfundamentally still be possible in almost all cases, with one exception,in that the now short-circuited line is in principle used as a fixedreference potential and the respective other line is switched asrequired for the signalling. Using the switching equipment S2 locatedbetween the lines L1 and L2, it will now be possible to generate the lowvoltage level even if one of the lines has a fixed potential. This isdone such that the switching equipment S2 will then be closed,respectively, and, via this equipment S2, the line which is stillfloating will be able to assume the voltage potential of the defectiveline, such that a potential difference U arises across the modules M1 .. . Mx which corresponds to the low voltage level. On a line with afixed potential, the high voltage level is respectively generated as apotential difference U of the first or second voltage potential withreference to this fixed potential (U=φ1-φ3 or U=φ2-φ3). The sign of thepotential difference can fundamentally be accounted for by means of arectifying circuit at the inputs of the modules M1 . . .Mx.

The sets of switching equipment S1 to S3 are again arranged analogous toFIG. 1. The switching states of the same are marked “closed” for theconductive state of the respective switching equipment, and “open” forthe non-conductive state. “High” marks the high voltage level, and,correspondingly, “low” stands for the low voltage level. In operatingmode B1, the change from “high” to “low” is additionally discussed bymeans of the arrow “→”.

In operating mode B1, the lines L1 and L2 are floating, that is, free ofpotential, if all three sets of switching equipment S1 . . . S3 areopen. In this mode, both lines can thus be actively used for signallingwith regard to the switching equipment position shown, “high” isprovided by the potential difference from φ1 and φ2.

When changing from High→Low, while S1 is in its opening movement, S2will be initially closed for at least a short time, but for themaintenance of a low voltage level it should preferably be kept closed.Initially, the capacitive parts of the switching equipment, lines, andmodules will be more quickly discharged due to the short circuit via S2,and the switching speed will be increased. In the subsequent operatingmodes B2 . . . B4, this changeover will no longer be shown, since it canultimately be applied independently from the individual signallingprocesses. The switching equipment S3 is not absolutely necessary forthe changeover and for achieving the low is voltage level, but it canadvantageously be closed and L2 set to φ2, which is usually the groundpotential. The only exception will be the operating mode, in which L2 isshorted to φ3, since closing S3 would lead to a short-circuit.

In the overview in FIG. 2, the operating mode B2 is initially shown asthe signalling for a short-circuit from L1 to the third voltagepotential φ3, which e.g. could be the operating supply voltage. In thiscase, the signalling is effected through S2 and S3. The high voltagelevel can then be derived as the potential difference from φ3 and φ2,“low” —as usual—by means of the short-circuit of L1 and L2 via S2. Theonly reason why the state of S1 is preferably permanently open isprovided by power dissipation considerations, as otherwise ashort-circuit would arise from φ3 to φ1. The signalling shown for thiscase can obviously also be applied to a short-circuit from L1 to φ1.

The signalling for a short-circuit from L2 to the third voltagepotential φ3 is shown as operating mode B3. This signalling is performedvia S1 and S2, with “high” being the potential difference between φ1 (S1closed) and φ3, and with “low” being effected by a short-circuit of L1and L2 via S2. In order to avoid excessive power dissipation caused by ashort-circuit at S3, S3 will preferably be in a permanent open state.

The signalling for a short-circuit from L2 to p2 is shown as operatingmode B4. Signalling is again effected via S1 and S2, but in this case“high” —as for the standard operating mode—is derived as the potentialdifference between φ1 (S1 closed) and φ2, but L2 remains fixed on thesecond voltage potential φ2. “Low” is again generated by means of ashort-circuit of L1 and L2 via S2. The state of S3 is not crucial inthis operating mode B4, e.g. set to “open” in this embodiment example.

FIG. 3 shows a selection decision table for the applied signallingprocess based on the measured operating modes or conditions. The exampleshown here was based on a measurement of the voltage potential of linesL1 and L2. Those conditions that cannot be rectified or corrected bymeans of the signalling output stage alone are crossed out; i.e. thedouble faults and the following two operating modes, namely theshort-circuit of

L1 to φ2 as well as that of L2 to φ1, that is, the respective oppositevoltage level with reference to the applied external switching equipment(S1, S3). The currents in the individual current testing devices I1 toI3 for switching equipments S1 to S3 can be clearly assigned to therespective operating modes, e.g. in the case of an excessive current inI3, L2 is set to φ1 or φ3; if, in addition, the current in I2 is alsoexcessive, L1 will be set to one of these voltage potentials, and if, inspite of the fact that S3 and S1 are closed, there is no current flow inI3, but rather in I1, there is a short-circuit to φ2 in one of the linesL1 or L2. This can also be distinguished by closing only S1. If even nowthe current in I1 is excessive, L1 is set to φ2. The floating conditionwill always be detected by the potential difference between L1 and L2,which in this case always equals zero for the closed switching equipmentS2.

FIG. 4 now shows a further development of the invention by using moduleswith longitudinal switches for isolating a short-circuit on the line. Inthis way, as will be explained below, it will nonetheless be possible toeffect a signalling even for those operating modes which so far couldnot be handled by the signalling output stage alone, if a bus system isused wherein at least one short circuit testing device 4 is provided forthe two lines L1, L2 in respect of all modules M, and wherein thistesting device tests the output of the respective line for an effectiveshort-circuit, namely a resistance value effective there which is toolow. For each of the two lines L1, L2 a switching device 5 isrespectively provided between the input and the output of a line in amodule (Mx, Mx-1), that can be conductive (5 a) or non-conductive (5 b).

Using these so-called longitudinal switches 5 with short-circuit testingdevice 4, however, it is possible to limit a short-circuit to a linesection between two modules (Mx, Mx-1), and the signalling outside thisline section can continue unchanged in that the switching devices 5 a(closed), 5 b (open) only then make a respective connection (5 a)between the input and the output of each of the two lines, once a testhas been performed at the respective output by means of theshort-circuit testing device(s) 4, and if this test has proven theabsence of a short-circuit.

The use of such longitudinal switches further increases the certainty ofsignal transmission and can be applied advantageously for the signallingoutput stage, as it permits the respective non-defective line to be usedfor signal transmission. Within the modules M, an internal groundpotential is provided for, against which the signalling voltagepotentials then build up a potential difference.

What is claimed is:
 1. Signalling output stage (1) for the generation ofdigital voltage signals on a bus system with a central processor unit(2) and a number of modules (M), connected to it by means of two lines(L1, L2), where the digital voltage signals assume one high voltagelevel and a corresponding lower voltage level, a) an upper switchingequipment (S1) between a first voltage potential (φ1) and the first line(L1), as well as a lower switching equipment (S3) between a second,comparatively lower voltage potential (φ2) and the second line (L2) isprovided for, b) the central processor unit features a test device (I1 .. . I3), by means of which faults on the lines, particularlyshort-circuits to a voltage potential can be detected, c) with astandard operating mode (B1) being provided, in which signal generationis effected by the high voltage level being generated by closing theupper and lower switching equipments (S1, S3), and the low voltage levelby opening at least the upper switching equipment (S1), and d) in caseof a fault, additional different operating modes (B2-B4) being providedfor, which in spite of the fault enable digital voltage signals to begenerated in such a way that they are adjusted to the type of fault,wherein e) a middle switching equipment (S2) is provided for between thefirst line (L1) and the second line (L2), by means of which signalgeneration will be maintained at least in the case of a fault on oneline.
 2. Signalling output stage according to claim 1, wherein a) thefirst and second voltage potential ((φ1, φ2) are chosen with regard to athird voltage potential (φ3), in particular a supply voltage, such a1)that a potential difference (U) between the third (φ3) and one of thetwo other voltage potentials (φ1 or φ2) is still detected as a highvoltage level by the modules (M), and b) at least three additionaloperating modes (B2, B3, B4) are provided in addition to the standardoperating mode (B1), b1) a second operating mode (B2) is provided, wherethe first line (L1) is shorted to the third voltage potential (φ3), inwhich signal generation is effected such that by closing the lowerswitching equipment (S3) and opening the middle switching equipment (S2)a potential difference (U=φ3-φ2) resulting from the third and the secondvoltage potential is generated across the modules (M), which potentialdifference is equated with the high voltage level by the modules (M) andwhere, by opening the lower (S3 open) and closing the middle switchingequipments (S2 closed), a difference (U=φ3-φ3=0) corresponding to thelow voltage level is generated across the modules (M), b2) a thirdoperating mode (B3) is provided, where the second line is shorted to thethird voltage potential (L2=φ3), in which signal generation is effectedsuch that by closing the upper switching equipment (S1 closed) andopening the middle switching equipment (S2) a potential difference (U 32φ1-φ3) resulting from the first and the third voltage potential isgenerated across the modules (M), which potential difference is equatedwith the high voltage level by the modules (M) and where, by opening theupper (S1 open) and closing the middle switching equipments (S2 closed),a potential difference (U) corresponding to the low voltage level isgenerated across the modules (M), b3) a fourth operating mode (B4) isprovided, where the second line is shorted to the second voltagepotential (L2=φ2) and where signal generation is effected such that byclosing the upper switching equipment (S1) and opening the middleswitching equipment (S2) the high voltage level is generated across themodules (M), and where, by opening the upper and closing the middleswitching equipments (S1, S2) a potential difference (U=φ2-φ2=0)corresponding to the low voltage level is generated across the modules(M).
 3. Signaling output stage according to claim 1, wherein, if allthree sets of switching equipment (S1 . . . S3) are open, both lines(L1, L2) are free of any potential, and in particular not shorted toground.
 4. Signaling output stage according to claim 1, wherein thesecond voltage potential (φ2) represents the ground potential. 5.Signaling output stage according to claim 1, wherein the modules (M) arearranged parallel to one another between the first and the second lines(L1, L2).
 6. Signaling output stage according to claim 1, wherein, inall operating modes (B1-B4), the middle switching equipment (S2) betweenthe first and the second lines (L1, L2) is closed for at least a shorttime when changing over from the high voltage level to the low voltagelevel, whilst at least the upper switching equipment (S1), is open. 7.Signaling output stage according to claim 1, wherein, in a normaloperating mode (B1), at low voltage level the lower switching equipment(S3) is closed.
 8. Signaling output stage according to claim 2, wherein,in the fourth operating mode (B4), the lower switching equipment (S3)will be opened for both voltage levels.
 9. Signaling output stageaccording to claim 2, wherein, in the second operating mode (B2) theupper switching equipment (S1) will be opened for both voltage levels.10. Signaling output stage according to claim 2, wherein, in the thirdoperating mode (B3) the lower switching equipment (S3) will be openedfor both voltage levels.
 11. Signaling output stage according to claim1, wherein the testing device measures current conductivity with oneswitching equipment (S1 . . . S3) being closed and/or measures thevoltage potential of the two lines (L1, L2).
 12. A circuit arrangementincluding the signaling output stage according to claim 1, within a bussystem, and further comprising the following features: a) all of themodules are further furnished with at least one short-circuit testingdevice (4) for the two lines (L1, L2), which testing device is adaptedto check the output of the respective line for an effectiveshort-circuit, namely an effective resistance which is too low, b) foreach of the two lines (L1, L2), there is further provided one switchingdevice (5 a, 5 b) located between an input and an output of therespective line, and c) the switching devices (5 a closed, 5 b open) arerespectively adapted to switch a connection (5 a closed) between theinput and the output of each respective one of the two lines (L1, L2),only after a test has been executed at the respective output by means ofthe respective short-circuit testing device (4) and if the test hasproven the absence of a short-circuit.
 13. Signaling output stageaccording to claim 6, wherein, in all said operating modes, whenchanging over from the high voltage level to the low voltage level,additionally the lower switching equipment (S3) is also open.
 14. Acircuit arrangement for providing digital voltage signals to pluralelectronic modules via a bus system, comprising: a first line and asecond line that form a bus system; plural electronic modules connectedto said first and second lines; signaling output stage that is connectedto said first line and to said second line and thereby is connected viasaid lines to said electronic modules, wherein said signaling outputstage comprises: a first voltage connection to a first voltagepotential; a second voltage connection to a second voltage potentialthat is lower than said first voltage potential; a first switchinterposed and connected between said first voltage connection and saidfirst line; a second switch interposed and connected between said firstline and said second line; and a third switch interposed and connectedbetween said second voltage connection and said second line; a testingarrangement connected and adapted to test for and detect a respectivefault condition on at least one of said first line and said second line;and a controller that is connected to said testing arrangement and tosaid first, second and third switches, and is adapted to control saidswitches in a manner dependent on and responsive to detection of saidrespective fault condition by said testing arrangement, so as to produceon said bus system digital voltage signals corresponding to potentialdifferences between a first actual voltage that exists on said firstline and a second actual voltage that exists on said second line. 15.The circuit arrangement according to claim 14, wherein, when saidtesting arrangement does not detect any said fault condition, saidcontroller is adapted to control said switches in a normal operatingmode in which a high voltage signal among said digital voltage signalsis produced by closing said first switch and said third switch andopening said second switch, and in which a low voltage signal among saiddigital voltage signals is produced by at least opening said firstswitch.
 16. The circuit arrangement according to claim 15, wherein, whensaid testing arrangement has detected said respective fault condition,and dependent on a particular nature of said respective fault condition,said controller is adapted to control said switches in a given faultoperating mode in which said high voltage signal is produced by closingone and opening another of said first and third switches and openingsaid second switch.
 17. The circuit arrangement according to claim 16,wherein said controller is adapted to control said second switch so asto close said second switch to produce said low voltage signal in all ofsaid operating modes.
 18. The circuit arrangement according to claim 14,wherein said controller is adapted to control said second switch so asto close said second switch to produce a low voltage signal among saiddigital voltage signals in all operating modes of said controllerregardless whether said testing arrangement detects said respectivefault condition.
 19. The circuit arrangement according to claim 18,wherein said controller is adapted to control said second switch so asto open said second switch to produce a high voltage signal among saiddigital voltage signals in all said operating modes of said controllerregardless whether said testing arrangement detects said respectivefault condition.
 20. The circuit arrangement according to claim 14,wherein said testing arrangement comprises a first current meterinterposed in series with said first switch between said first voltageconnection and said first line, a second current meter interposed inseries with said second switch between said first line and said secondline, and a third current meter interposed in series with said thirdswitch between said second voltage connection and said second line. 21.The circuit arrangement according to claim 14, wherein said testingarrangement comprises a first voltage meter connected to said first lineand a second voltage meter connected to said second line.
 22. Thecircuit arrangement according to claim 14, wherein a given line amongsaid first line and said second line is connected through a given moduleamong said electronic modules via a line input and a line output of saidgiven module, wherein said given module includes a short-circuit testingdevice and a switch device connected parallel to each other between saidline input and said line output, and wherein said short-circuit testingdevice is connected to said switch device for control signaltransmission thereto.
 23. The circuit arrangement according to claim 14,wherein: said digital voltage signals include defined high and lowvoltage signals; said first and second voltage potentials are selectedrelative to each other and relative to an external third voltagepotential and relative to said high and low voltage signals, so that apotential difference between said first and second voltage potentials, apotential difference between said second and third voltage potentials,and a potential difference between said first and third voltagepotentials are all allocated to said high voltage signal; saidcontroller is adapted to control said switches in any of a normaloperating mode, a second operating mode, a third operating mode and afourth operating mode dependent on and responsive to whether saidtesting arrangement has detected said respective fault condition; whensaid testing arrangement does not detect any said fault condition, saidcontroller is adapted to control said switches in said normal operatingmode in which said high voltage signal is produced by closing said firstswitch and said third switch and opening said second switch, and saidlow voltage signal is produced by at least opening said first switch;when said testing arrangement detects a first type of said faultcondition wherein said first line is shorted to said third voltagepotential, said controller is adapted to control said switches in saidsecond operating mode in which said high voltage signal is produced byclosing said third switch and opening said second switch, and said lowvoltage signal is produced by opening said third switch and closing saidsecond switch; when said testing arrangement detects a second type ofsaid fault condition wherein said second line is shorted to said thirdvoltage potential, said controller is adapted to control said switchesin said third operating mode in which said high voltage signal isproduced by closing said first switch and opening said second switch,and said low voltage signal is produced by opening said first switch andclosing said second switch; and when said testing arrangement detects athird type of said fault condition wherein said second line is shortedto said second voltage potential, said controller is adapted to controlsaid switches in said fourth operating mode in which said high voltagesignal is produced by closing said first switch and opening said secondswitch, and said low voltage signal is produced by opening said firstswitch and closing said second switch.
 24. The circuit arrangementaccording to claim 23, wherein, in said normal operating mode, said lowvoltage signal is produced further by closing said third switch.
 25. Thecircuit arrangement according to claim 23, wherein, in said fourthoperating mode, said third switch is open for producing both said highvoltage signal and said low voltage signal.
 26. The circuit arrangementaccording to claim 23, wherein, in said second operating mode, saidfirst switch is open for producing both said high voltage signal andsaid low voltage signal.
 27. The circuit arrangement according to claim23, wherein, in said third operating mode, said third switch is open forproducing both said high voltage signal and said low voltage signal. 28.The circuit arrangement according to claims 14, wherein, when saidfirst, second and third switches are said first and second lines arefree of any potential and are not shorted to ground.
 29. The circuitarrangement according to claims 14, wherein said second voltagepotential is a ground potential.
 30. The circuit arrangement accordingto claim 14, wherein said electronic modules are each respectivelyconnected to said first line and to said second line, and are arrangedparallel to each other between said first line and said second line. 31.A method of generating digital high and low voltage signals on a busincluding a first line and a second line, comprising the steps: a)detecting whether a first line short fault exists on said first line; b)detecting whether a second line short fault exists on said second line;c) when neither said first line short fault nor said second line shortfault is detected, then selectively generating said high voltage signaland said low voltage signal according to a normal operating mode,wherein said high voltage signal is generated by connecting said firstline to a first voltage potential, connecting said second line to asecond voltage potential, and disconnecting said first and second linesfrom each other, and wherein said low voltage signal is generated bydisconnecting said first line from said first voltage potential andconnecting said first and second lines to each other; d) when said firstline short fault is detected, then selectively generating said highvoltage signal and said low voltage signal according to a first faultoperating mode, wherein said high voltage signal is generated byconnecting said second line to said second voltage potential anddisconnecting said first and second lines from each other, and whereinsaid low voltage signal is generated by disconnecting said second linefrom said second voltage potential and connecting said first and secondlines to each other; and e) when said second line short fault isdetected, then selectively generating said high voltage signal and saidlow voltage signal according to a second fault operating mode, whereinsaid high voltage signal is generated by connecting said first line tosaid first voltage potential and disconnecting said first and secondlines from each other, and wherein said low voltage signal is generatedby disconnecting said first line from said first voltage potential andconnecting said first and second lines to each other.
 32. The methodaccording to claim 31, wherein: in said normal operating mode, said lowvoltage signal is generated further by connecting said second line tosaid second voltage potential; said first fault operating mode furtherinvolves disconnecting said first line from said first voltage potentialboth when generating said low voltage signal and when generating saidhigh voltage signal; and said second fault operating mode furtherinvolves disconnecting said second line from said second voltagepotential both when generating said low voltage signal and whengenerating said high voltage signal.